Design of Asynchronous Viterbi Decoder using Dual-Rail Protocol for Low Power Consumption. Journal of Advance Research in Mechanical and Civil Engineering (ISSN: 2208-2379), [S. l.], v. 2, n. 3, p. 46–49, 2015. DOI: 10.53555/nnmce.v2i3.352. Disponível em: https://jarmce.com/index.php/mce/article/view/14. Acesso em: 22 aug. 2025.